Projects

Bandgap Design for Voltage Reference in Cadence

Designed a bandgap voltage reference circuit with low temperature coefficient.

Project Overview

  • Supply Voltage: 1.8 V
  • Temperature Coefficient: < ±34.3 ppm/°C
  • Power Consumption: 365.6 µW
  • Output Voltage: 1.06 V
View Project on GitHub

Delta-Sigma-Modulator in Cadence

Designed a delta sigma modulator using 55nm technology with RVT devices, operating at 1.2V, a frequency range of 10KHz to 50KHz, 600mV reference voltage for integrator and comparator, external clock speed of 5MHz to 10MHz, 10µA reference current for the differential amplifier, and 1-bit resolution.

Project Overview

  • Technology: 55nm
  • Device: RVT (Regular-VT)
  • Operating Voltage: 1.2 V
  • Frequency Range: 10KHz – 50KHz
  • Reference Voltage: 600mV (Integrator, Comparator)
  • External Clock Speed: 5MHz – 10MHz
  • Reference Current: 10µA (Differential Amplifier)
  • Bit Resolution: 1-bit
View Project on GitHub

PLL Design for Frequency Generation in Cadence

Designed a PLL for frequency generation (200 MHz to 1.6 GHz) with optimized settling times and low power consumption.

Project Overview

  • Frequency Range: 200 MHz to 1.6 GHz
  • Supply Voltage: 1.2 V
  • Settling Times:
    • Slow-Slow (SS): 873 ns
    • Typical-Typical (TT): 715 ns
    • Fast-Fast (FF): 507 ns
  • Power Consumption:
    • SS: 110.5 µW
    • TT: 163.4 µW
    • FF: 215.3 µW
  • Optimization: Low power and fast settling across PVT variations
View Project on GitHub